When is partial trace equivalence adequate?

Two processes arepartial trace equivalent iff they can perform the same sequences of actions in isolation. Partial trace equivalence is perhaps the simplest possible notion of process equivalence. In general, it is too simple: it is not usually an adequate semantics. We investigate the circumstances under which it is adequate, which are surprisingly rich. We give two substantial classes of languages for which partial traces are adequate. In one class, partial trace equivalence suffices for total correctness, and operations such as true sequencing are possible; but all processes are determinate and silent moves are not possible. The other class — which includes many standard process calculi, such as CCS and CSP — admits indeterminacy and silent moves, but partial traces only suffice for partial correctness and true sequencing is not definable.

[1]  Robert de Simone,et al.  Higher-Level Synchronising Devices in Meije-SCCS , 1985, Theor. Comput. Sci..

[2]  Jan Friso Groote,et al.  The meaning of negative premises in transition system specifications , 1991, JACM.

[3]  Michael W. Mislove,et al.  A Simple Language Supporting Angelic Nondeterminism and Parallel Composition , 1991, MFPS.

[4]  Rob J. van Glabbeek,et al.  Branching time and abstraction in bisimulation semantics , 1996, JACM.

[5]  R. J. vanGlabbeek The linear time - branching time spectrum , 1990 .

[6]  Robin Milner,et al.  Communication and concurrency , 1989, PHI Series in computer science.

[7]  Albert R. Meyer,et al.  Experimenting with Process Equivalence , 1992, Theor. Comput. Sci..

[8]  Joost Engelfriet,et al.  Determinacy - (Observation Equivalence = Trace Equivalence) , 1985, Theor. Comput. Sci..

[9]  Nicolien J. Drost,et al.  Algebraic Formulations of Trace Theory , 1991, CONCUR.

[10]  Jan Friso Groote,et al.  Structural Operational Semantics and Bisimulation as a Congruence (Extended Abstract) , 1989, ICALP.

[11]  Rocco De Nicola,et al.  Testing Equivalences for Processes , 1984, Theor. Comput. Sci..

[12]  Frits W. Vaandrager,et al.  Determinism - (Event Structure Isomorphism = Step Sequence Equivalence) , 1991, Theor. Comput. Sci..

[13]  A. Meyer,et al.  Bisimulation can't be traced. Preliminary report , 1987 .

[14]  Jan Friso Groote,et al.  Structured Operational Semantics and Bisimulation as a Congruence , 1992, Inf. Comput..

[15]  Ilaria Castellani,et al.  Permutation of transitions: An event structure semantics for CCS and SCCS , 1988, REX Workshop.

[16]  D. J. Walker,et al.  Bisimulation and Divergence , 1990, Inf. Comput..

[17]  Tommaso Bolognesi,et al.  Tableau methods to describe strong bisimilarity on LOTOS processes involving pure interleaving and enabling , 1994, FORTE.

[18]  Rob J. van Glabbeek,et al.  The Linear Time - Branching Time Spectrum I , 2001, Handbook of Process Algebra.

[19]  Henk Barendregt,et al.  The Lambda Calculus: Its Syntax and Semantics , 1985 .

[20]  Robin Milner,et al.  Calculi for Synchrony and Asynchrony , 1983, Theor. Comput. Sci..

[21]  Steven J. Vickers,et al.  Quantales, observational logic and process semantics , 1993, Mathematical Structures in Computer Science.

[22]  Bloom Bard,et al.  Ready simulation, bisimulation, and the semantics of CCS-like languages , 1989 .

[23]  Jan A. Bergstra,et al.  Algebra of Communicating Processes , 1995, Workshops in Computing.

[24]  Frits W. Vaandrager,et al.  On the relationship between process algebra and input/output automata , 1991, [1991] Proceedings Sixth Annual IEEE Symposium on Logic in Computer Science.

[25]  C. A. R. Hoare,et al.  A Theory of Communicating Sequential Processes , 1984, JACM.

[26]  Matthew Hennessy,et al.  Synchronous and Asynchronous Experiments on Processes , 1984, Inf. Control..

[27]  Ursula Goltz,et al.  Equivalence Notions for Concurrent Systems and Refinement of Actions (Extended Abstract) , 1989, MFCS.

[28]  Antoni W. Mazurkiewicz,et al.  Basic notions of trace theory , 1988, REX Workshop.

[29]  Rob J. van Glabbeek,et al.  The Linear Time - Branching Time Spectrum II , 1993, CONCUR.

[30]  David L. Dill,et al.  Trace theory for automatic hierarchical verification of speed-independent circuits , 1989, ACM distinguished dissertations.

[31]  C. A. R. Hoare,et al.  Communicating sequential processes , 1978, CACM.

[32]  Jan Tijmen Udding,et al.  A formal model for defining and classifying delay-insensitive circuits and systems , 1986, Distributed Computing.

[33]  Alberto Pettorossi,et al.  Observers, Experiments and Agents: a Comprehensive Approach to Parallelism , 1990, Semantics of Systems of Concurrent Processes.