Design and construction of an active periodic noise cancelling system using FPGAs

The purpose in this presentation is to design and construct a simple active periodic noise cancellation system (APNC) by using FPGAs technology. The design follows a simplified version of the waveform synthesis method, using an adaptive least mean square error technique. The simulation results show a 40 db noise reduction for the case of single frequency noise combined with its three consecutive harmonics. For the hardware implementation TI's TPC1020A FPGAs package with 2000 equivalent gates has been adopted.<<ETX>>