Exploiting architectural solutions for IIR filter architecture with truncation error feedback

Digital filters are widely used in digital systems, which can make use of integer arithmetic to achieve higher performance. The use of integer operands can compromise the filter operation, due to the inherently error caused by truncation operations. Addressing this kind of problem, we propose an IIR filter for biomedical signals using the truncation error feedback (TEF), in which a feedback signal is obtained from the division remainder of the truncation operation. Two dedicated fully-sequential and parallel architectures were implemented and simulated using VHDL language, and synthesized in Cadence environment using the 45 nm Nangate Open Cell Library. A simulated ECG signal was used as input to verify the functionality of an IIR high pass filter with TEF. The results of our analysis indicate that the use of TEF can be an important approach in digital systems, where integer arithmetic for computation is adequate for performance requirements. Using this feedback signal, the design specifications of the filter remained significantly the same compared to the filter specification, independently of the cut-off and sample frequency ratio.