A 1-ps Resolution On-Chip Sampling Oscilloscope with 64:1 Tunable Sampling Range Based on Ramp Waveform Division Scheme

An on-chip sampling oscilloscope with lps timing resolution is realized in 90nm CMOS process based on a proposed ramp waveform division scheme for precise signal integrity and power-line integrity measurement. The resolution in time is variable from 1ps to 64ps in 64 steps. A novel on-chip inductance measurement procedure is also proposed