Fault Models and Injection Strategies in SystemC Specifications

This paper presents fault models and fault injection strategies designed in a simulation platform with reflection capabilities, used for simulating complex systems specified by using SystemC and by adopting a platform-based design approach. The approach allows the designer to work at different levels of abstraction and to take into account permanent and transient faults, and -- most important -- it features a transparent and dynamic mechanism for both injecting faults and analyzing the produced errors, in order to evaluate possible fault detection and/or tolerance design techniques.

[1]  Fabrizio Ferrandi,et al.  A Framework for the Functional Verification of SystemC Models , 2005, International Journal of Parallel Programming.

[2]  Kun-Jun Chang,et al.  System-Level fault Injection in System Design Platform , 2007 .

[3]  Heinrich Theodor Vierhaus,et al.  Fault Injection Techniques and their Accelerated Simulation in SystemC , 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

[4]  Franco Fummi,et al.  AMLETO: a multi-language environment for functional test generation , 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

[5]  Richard D. Eldred Test Routines Based on Symbolic Logical Statements , 1959, JACM.

[6]  Heinrich Theodor Vierhaus,et al.  A Mixed Language Fault Simulation of VHDL and SystemC , 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

[7]  Fabrizio Ferrandi,et al.  Identification of design errors through functional testing , 2003, IEEE Trans. Reliab..

[8]  James F. Ziegler,et al.  Terrestrial cosmic rays , 1996, IBM J. Res. Dev..

[9]  Luca Fossati,et al.  ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration , 2008, 2008 Asia and South Pacific Design Automation Conference.

[10]  Eliane Martins,et al.  A fault injection approach based on reflective programming , 2000, Proceeding International Conference on Dependable Systems and Networks. DSN 2000.

[11]  Franco Fummi,et al.  LAERTE++: an Object Oriented High-level TPG for SystemC Designs , 2003, FDL.

[12]  Pedro J. Gil,et al.  Comparison and application of different VHDL-based fault injection techniques , 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

[13]  Luca Fossati,et al.  ReSP: A Nonintrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[14]  Eliane Martins,et al.  Jaca - a software fault injection tool , 2003, 2003 International Conference on Dependable Systems and Networks, 2003. Proceedings..

[15]  Christian Steger,et al.  High level fault injection for attack simulation in smart cards , 2004, 13th Asian Test Symposium.