Reliability Analysis and Optimal Redundancy for Majority-Voted Logic Circuits

A scheme using multiple redundant computing devices with a majority voter improves the reliability of the output of the computing device. This paper analyzes some modular redundant systems with majority voters. An iterative structure is introduced for voters in order to improve the total reliability. The reliability of voters is introduced in several ways. Two models of imperfect voters are discussed in detail, that is, output-imperfect model and semiperfect model. The former is suitable for the case where voters are treated in the same manner as other modules. The latter is appropriate for the case where the characteristics of the voter are taken into account. Three theorems show the existence of optimal majority-voted logic circuit for a given value of the reliability of each module under some reasonable assumptions.