论文信息 - Dealing With Temporal Complexity in hardware verification

Dealing With Temporal Complexity in hardware verification

An overview of modelling and verifying temporal aspects of digital hGdware behaviour is presented. Varzous techniques can be used for reasoning about temporal behaviour an HOL; here we concentrate on showing that HOL provides a good general basis by describing certain powerful techniques that are well supported by the system. We discuss the embedding of a temporal logic, the use of temporal abstraction to relate diflerent timing levels, and the ability to relate different models of time. Inherent complezity in the lime dependent behaviour of digiial systems is also (lis cussed.

John Herbert | J. Herbert

[1] Keith Hanna,et al. Specification and Verification using Higher-Order Logic: A Case Study , 1986 .

[2] Phillip J. Windley. A Hierarchical Methodology for Verifying Microprogrammed Microprocessors , 1990, IEEE Symposium on Security and Privacy.

[3] Rachel Cardell-Oliver,et al. Formal verification of real-time protocols using higher order logic , 1990 .

[4] I. S. Dhingra. Formal Validation of an Integrated Circuit Design Style , 1988 .

[5] Michael J. C. Gordon,et al. Mechanizing programming logics in higher order logic , 1989 .

[6] M. Fujita. Application of temporal logic to the assistance of hardware logic design , 1988, [1988] Proceedings. The Eighteenth International Symposium on Multiple-Valued Logic.

[7] John M. J. Herbert. Application of formal methods to digital system design , 1986 .

[8] 藤田昌宏,et al. Logic design assistance with temporal logic , 1985 .

[9] Phillip John Windley. The formal verification of generic interpreters , 1990 .

[10] Tom Melham,et al. Abstraction Mechanisms for Hardware Verification , 1988 .

[11] Avra Cohn,et al. A Proof of Correctness of the Viper Microprocessor: The First Level , 1988 .

[12] Jeffrey John Joyce,et al. Multi-level verification of microprocessor-based systems , 1989 .

[13] Roger William Stephen Hale. Programming in temporal logic , 1988 .

[14] Natarajan Shankar,et al. From formal verification to silicon compilation , 1991, COMPCON Spring '91 Digest of Papers.