Novel large area joining technique for improved power device performance

Conventional techniques for joining a silicon wafer to suitable substrates do not satisfy the demands of future power devices. Therefore, a low-temperature joining technique based on the principle of diffusion welding has been developed. The surfaces to be joined are metallized with Ag or Au, and the molybdenum substrate is coated with a thin layer of silver flakes. The parts to be joined are then sintered together at about 240 degrees C and a pressure of approximately 40 N/mm/sup 2/ within a few minutes. The joining technique does not affect the silicon wafer and accordingly is compatible with conventional power device and IC fabrication techniques. Both sides of the wafer can be joined with substrates even if IC structures are present. This possibility allows an increased surge current. Numerical calculations for different wafer thicknesses have been performed and compared with results on test devices. The technical usefulness of this approach has been proved by additional tests such as thermal cycling.<<ETX>>