LETAM: A low energy truncation-based approximate multiplier
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Massoud Pedram | Ali Afzali-Kusha | Mehdi Kamal | Shaghayegh Vahdat | Massoud Pedram | M. Kamal | A. Afzali-Kusha | Shaghayegh Vahdat
[1] D.J. Mclaren,et al. Improved Mitchell-based logarithmic multiplier for low-power DSP applications , 2003, IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings..
[2] Z. Babic,et al. An Iterative Mitchell's Algorithm Based Multiplier , 2008, 2008 IEEE International Symposium on Signal Processing and Information Technology.
[3] Ronald F. DeMara,et al. Designing energy-efficient approximate adders using parallel genetic algorithms , 2015, SoutheastCon 2015.
[4] Dheeraj Sharma,et al. Low power, high speed error tolerant multiplier using approximate adders , 2015, 2015 19th International Symposium on VLSI Design and Test.
[5] Marian Verhelst,et al. DVAS: Dynamic Voltage Accuracy Scaling for increased energy-efficiency in approximate computing , 2015, 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).
[6] D. Marino. New Algorithms for the Approximate Evaluation in Hardware of Binary Logarithms and Elementary Functions , 1972, IEEE Transactions on Computers.
[7] N. Ranganathan,et al. An efficient and accurate logarithmic multiplier based on operand decomposition , 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).
[8] Arnab Raha,et al. A Power Efficient Video Encoder Using Reconfigurable Approximate Arithmetic Units , 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.
[9] Sherief Reda,et al. DRUM: A Dynamic Range Unbiased Multiplier for approximate applications , 2015, 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[10] Thomas A. Brubaker,et al. Multiplication Using Logarithms Implemented with Read-Only Memory , 1975, IEEE Transactions on Computers.
[11] Puneet Gupta,et al. Trading Accuracy for Power in a Multiplier Architecture , 2011, J. Low Power Electron..
[12] ERNEST L. HALL,et al. Generation of Products and Quotients Using Approximate Binary Logarithms for Digital Filtering Applications , 1970, IEEE Transactions on Computers.
[13] Taejoon Park,et al. Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[14] Chaitali Chakrabarti,et al. Image processing using approximate datapath units , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).
[15] Ing-Chao Lin,et al. High accuracy approximate multiplier with error correction , 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).
[16] Andreas Gerstlauer,et al. Multi-level approximate logic synthesis under general error constraints , 2014, 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[17] John N. Mitchell,et al. Computer Multiplication and Division Using Binary Logarithms , 1962, IRE Trans. Electron. Comput..
[18] Fabrizio Lombardi,et al. A low-power, high-performance approximate multiplier with configurable partial error recovery , 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[19] Kartikeya Bhardwaj,et al. Power- and area-efficient Approximate Wallace Tree Multiplier for error-resilient systems , 2014, Fifteenth International Symposium on Quality Electronic Design.
[20] Ayman I. Kayssi,et al. Energy-efficient HEVC using stochastic processing , 2013, 2013 4th Annual International Conference on Energy Aware Computing Systems and Applications (ICEAC).
[21] Fabrizio Lombardi,et al. A Design Approach for Compressor Based Approximate Multipliers , 2015, 2015 28th International Conference on VLSI Design.
[22] Chip-Hong Chang,et al. A Low Error and High Performance Multiplexer-Based Truncated Multiplier , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[23] Babu M. Pranay,et al. Accuracy Configurable Modified Booth Multiplier Using Approximate Adders , 2015, 2015 IEEE International Symposium on Nanoelectronic and Information Systems.