BIST architecture for oscillation test of analog ICs and investigation of test hardware influence

Abstract In this article, a fully on-chip implementation of the oscillation-based test for analog and mixed-signal systems is presented. The proposed test hardware uses an on-chip reference oscillator to compensate the undesired impact of process parameter variations. Thus, this approach can be easily and effectively implemented also in nanoscale technologies. As the circuit under test (CUT), an operational amplifier designed in a 90 nm CMOS technology was used. The possible influence of additional test hardware on the CUT performance as well as the test reliability were investigated and analyzed. Finally, results obtained by this analysis are discussed.

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