Design and Testing an Artificial Arm M icrosystems in Virtual Environment

In this paper is presented a virtual environment that was designed in order to develop and test different architectures for Artificial Arms microsystems. The utility of the virtual environment is significant because testing different structures of Artificial Arms and microsystems architectures and then selecting the best option is much cheaper when it is used a virtual environment compared to the option of testing different hardware implemented microsystems. The virtual environment also allows the user to evaluate the performance/cost ratio for each microsystem correlated with the type of the Artificial Arm that was used.

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