A silicon optical bench approach to low cost high speed transceivers

In order to meet the increasing demand for bandwidth at reduced cost, new optical subassemblies must meet the critical demands of high data rate, 2.5-10 Gbit/s and a package amenable to high-volume and low cost production. Current approaches utilizing laser mounting to header assemblies with active laser alignment to outgoing optical fibers fail on both accounts. In response to this, the work described here details the development of a passively aligned silicon wafer board package capable of rates of 10 Gb/s and higher. Results show that through careful design and process control, single crystal silicon substrates containing passive alignment features (e.g., v-grooves, fiducial markings, etc.) can be reproducibly fabricated with sub-micron dimensional accuracies. The processing of the silicon wafer board and initial assembly of the components will be presented.