Compiling with code-size constraints

Most compilers ignore the problems of limited code space in embedded systems. Designers of embedded software often have no better alternative than to manually reduce the size of the source code or even the compiled code. Besides being tedious and error-prone, such optimization results in obfuscated code which is difficult to maintain and reuse. In this paper, we present a code-size-directed compiler. We phrase register allocation and code generation as an integer linear programming problem where the upper bound on the code size can simply be expressed as an additional constraint. Our experiments show that our compiler, when applied to two commercial microcontroller programs, generates code as compact as carefully crafted code.

[1]  Andrew W. Appel,et al.  Optimal spilling for CISC machines with few registers , 2001, PLDI '01.

[2]  Rajeev Barua,et al.  Heterogeneous memory management for embedded systems , 2001, CASES '01.

[3]  Timothy Kong,et al.  Precise register allocation for irregular architectures , 1998, Proceedings. 31st Annual ACM/IEEE International Symposium on Microarchitecture.

[4]  Carl von Platen,et al.  Storage allocation for embedded processors , 2001, CASES '01.

[5]  Jens Palsberg,et al.  Static checking of interrupt-driven software , 2001, Proceedings of the 23rd International Conference on Software Engineering. ICSE 2001.

[6]  Arthur Stoutchinin.  An Integer Linear Programming Model of Software Pipelining for the MIPS R8000 Processor , 1997, PaCT.

[7]  Brian W. Kernighan,et al.  AMPL: A Modeling Language for Mathematical Programming , 1993 .

[8]  Sharad Malik,et al.  Simultaneous reference allocation in code generation for dual data memory bank ASIPs , 2000, TODE.

[9]  Kent D. Wilken,et al.  Optimal and Near‐optimal Global Register Allocation Using 0–1 Integer Programming , 1996, Softw. Pract. Exp..

[10]  Amit Rao,et al.  Storage assignment optimizations to generate compact and efficient code on embedded DSPs , 1999, PLDI '99.

[11]  Rainer Leupers,et al.  Algorithms for address assignment in DSP code generation , 1996, ICCAD 1996.

[12]  Ulrich Kremer,et al.  Optimal and Near-Optimal Solutions for Hard Compilation Problems , 1997, Parallel Process. Lett..

[13]  Vivek Sarkar,et al.  Combining Register Allocation and Instruction Scheduling , 1995 .

[14]  Vincenzo Liberatore,et al.  Evaluation of Algorithms for Local Register Allocation , 1999, CC.

[15]  Kurt Keutzer,et al.  Storage assignment to decrease code size , 1996, TOPL.

[16]  Soo-Mook Moon,et al.  Register Allocation for Banked Register File , 2001 .

[17]  Guang R. Gao,et al.  Software pipelining showdown: optimal vs. heuristic methods in a production compiler , 1996, PLDI '96.