A cascaded CT ΣΔ modulator with NTF zero and simple mismatch tuning method using interstage feedback

A cascaded continuous-time SigmaDelta modulator with programmable NTF zero and simple mismatch correction method is proposed. By using interstage feedback the loop filter resonator is not needed to introduce an NTF zero. As a result of the absence of resonators very simple mismatch tuning methods can be applied because the interstage feedback does not have influence in the mismatch properties. Moreover the loop filter stability is improved when the resonator is removed. Analytical expressions to calculate the interstage feedback gain are proposed to place the NTF zero in the desired location in the continuous-time case. To validate the proposed method several Monte Carlo analyses have been carried out showing an improvement in the mean SNR value of 10dB.

[1]  K. S. Chao,et al.  A fourth-order cascaded sigma-delta modulator with DAC error cancellation technique , 2002, The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002..

[2]  K. S. Chao,et al.  A multi-bit sigma-delta modulator with interstate feedback , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[3]  L.J. Breems,et al.  A cascaded continuous-time /spl Sigma//spl Delta/ modulator with 67dB dynamic range in 10MHz bandwidth , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[4]  Francisco V. Fernández,et al.  A New High-Level Synthesis Methodology of Cascaded Continuous-Time$SigmaDelta$Modulators , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

[5]  Manuel Sanchez-Renedo,et al.  A 2-2 Discrete Time Cascaded ΣΔ Modulator With NTF Zero Using Interstage Feedback , 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

[6]  Franco Maloberti High-speed data converters for communication systems , 2001 .

[7]  Á. Rodríguez-Vázquez,et al.  A New High-Level Synthesis Methodology of Cascaded Continuous-Time Modulators , 2006 .

[8]  Maurits Ortmanns,et al.  A case study on a 2-1-1 cascaded continuous-time sigma-delta Modulator , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[9]  Richard Schreier,et al.  An empirical study of high-order single-bit delta-sigma modulators , 1993 .

[10]  L.J. Breems,et al.  A cascaded continuous-time /spl Sigma//spl Delta/ Modulator with 67-dB dynamic range in 10-MHz bandwidth , 2004, IEEE Journal of Solid-State Circuits.

[11]  N. Pike Sigma-Delta Modulators with Interstage Gain Scaling , 2000 .