A Theoretical Comparison of Strained-Si-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors and Conventional Si-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors Using a Drift-Diffusion-Based Simulator

Strained-Si-on-insulator (strained-SOI) metal–oxide–semiconductor field-effect transistors (MOSFETs) were compared to conventional SOI MOSFETs in terms of short-channel effects and delay time using a drift-diffusion-based device simulator. In the case of 90 nm gate devices, threshold voltage Vth for strained-SOI nMOSFETs decreased with decreasing conduction-band edge discontinuity, while Vth dependence on conduction-band edge and valence-band edge discontinuities for strained-SOI pMOSFETs were complicated. An analytical expression for Vth in strained-SOI pMOSFETs could explain the simulated results. The Vth shift for strained-SOI nMOSFETs with shortening the gate length was slightly smaller than that for conventional SOI nMOSFETs, while Vth shift for strained-SOI pMOSFETs was larger than that for conventional SOI nMOSFETs. The Vth shift for strained-SOI nMOSFETs with a strain-Si thickness tSi greater than the source and drain junction depth xj was smaller than that for strained-SOI nMOSFETs with tSi<xj. The strained-SOI MOSFETs were approximately 15% faster than conventional SOI MOSFETs when the saturation velocities were assumed to be 107 cm/s for both strained- and conventional SOI MOSFETs. Strained-SOI nMOSFETs are 1.9 times faster than conventional SOI nMOSFETs when the electron velocity overshoot is developed.