Electro-Thermal Modelling of an HVDC-Converter During Fault Conditions
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This thesis investigates the electro-thermal stresses on the converter
semiconductor components during surge currents events in a
VSC HVDC-system using MMC topology. A typical HVDC-link is
described and modelled in PSCAD simulation software and analytical
calculations were performed alongside in order to confirm the simulated
fault current peak values. Both the analytical calculations and
simulations have shown that the most severe fault cases for the converter
components are when faults occurs on DC-side of the converter,
so called pole-to-pole and pole-to-ground faults. These fault currents
are mainly conducted by the semiconductor diodes in the converter for
which two different kinds of voltage drop models were derived - one
extrapolated measurement based model and one physics based Lauritzen
power diode model. The corresponding temperature response
of the diode was simulated by a thermal model using Cauer electrical
network representation. All models were created and combined in a
Matlab/Simulink environment.
The Lauritzen model has proven to give satisfying results in the
transient electro-thermal investigation for surge currents with lower
peak values. However, during higher surge currents, the model starts to
deviate from the measurement based model and estimate larger losses.
The parameter extraction process for the Lauritzen model is time consuming
for a new component and if the model parameters does not
already exist, the benefits compared to the measurement based model
are negligible. Similar to the Laurtizen model, the extrapolated model
with the three different types of temperature coefficient starts also to
deviate for higher surge currents. Better knowledge of the temperature
dependent voltage drop combined with more detailed measurements in
higher current and temperature range are needed in order to achieve
more accurate simulations.