Programming models and HW-SW interfaces abstraction for multi-processor SoC

For the design of classic computers the parallel programming concept is used to abstract HW/SW interfaces during high level specification of application software. The software is then adapted to existing multiprocessor platforms using a low level software layer that implements the programming model. Unlike classic computers, the design of heterogeneous MPSoC includes also building the processors and other kind of hardware components required to execute the software. In this case, the programming model hides both hardware and software refinements. This paper deals with parallel programming models to abstract both hardware and software interfaces in the case of heterogeneous MPSoC design. Different abstraction levels are needed. For the long term, the use of higher level programming models open new vistas for optimization and architecture exploration like CPU/RTOS tradeoffs

[1]  Martina Zitterbart,et al.  A Model for Flexible High-Performance Communication Subsystems , 1993, IEEE J. Sel. Areas Commun..

[2]  Ahmed Amine Jerraya,et al.  Multi-processor SoC design methodology using a concept of two-layer hardware-dependent software , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[3]  Conclusions , 1989 .

[4]  Wayne H. Wolf.  High-Performance Embedded Computing , 2007 .

[5]  Wayne Wolf.  High-Performance Embedded Computing: Architectures, Applications, and Methodologies , 2006 .

[6]  F. Petrot,et al.  A Unified HW/SW Interface Refinement Approach for MPSoC Design , 2006, 2006 IEEE North-East Workshop on Circuits and Systems.

[7]  Ahmed Amine Jerraya,et al.  Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model , 2004 .

[8]  Erwin A. de Kock,et al.  Design and programming of embedded multiprocessors: an interface-centric approach , 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

[9]  Hannu Tenhunen,et al.  Guest Editors' Introduction: Multiprocessor Systems-on-Chips , 2005, Computer.

[10]  Xi Chen,et al.  A unified HW/SW interface model to remove discontinuities between HW and SW design , 2005, EMSOFT.

[11]  Thorsten von Eicken,et al.  技術解説 IEEE Computer , 1999 .

[12]  C. Berthet.  Going mobile: the next horizon for multi-million gate designs in the semi-conductor industry , 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

[13]  4G applications, architectures, design methodology and tools for MPSoC , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[14]  Damien Lyonnard,et al.  Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[15]  Anoop Gupta,et al.  Parallel computer architecture - a hardware / software approach , 1998 .

[16]  Frank Ghenassia,et al.  Transaction Level Modeling with SystemC , 2005 .

[17]  Chris Rowen,et al.  Engineering the Complex SOC , 2004 .

[18]  David B. Skillicorn,et al.  Models and languages for parallel computation , 1998, CSUR.