From OO to FPGA: fitting round objects into square hardware?

Consumer electronics today such as cell phones often have one or more low-power FPGAs to assist with energyintensive operations in order to reduce overall energy consumption and increase battery life. However, current techniques for programming FPGAs require people to be specially trained to do so. Ideally, software engineers can more readily take advantage of the benefits FPGAs offer by being able to program them using their existing skills, a common one being object-oriented programming. However, traditional techniques for compiling object-oriented languages are at odds with today's FPGA tools, which support neither pointers nor complex data structures. Open until now is the problem of compiling an object-oriented language to an FPGA in a way that harnesses this potential for huge energy savings. In this paper, we present a new compilation technique that feeds into an existing FPGA tool chain and produces FPGAs with up to almost an order of magnitude in energy savings compared to a low-power microprocessor while still retaining comparable performance and area usage.

[1]  Shan Shan Huang,et al.  Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary , 2008, ECOOP.

[2]  Jens Palsberg,et al.  Vertical object layout and compression for fixed heaps , 2007, CASES '07.

[3]  Jason Cong,et al.  AutoPilot: A Platform-Based ESL Synthesis System , 2008 .

[4]  Ben L. Titzer Virgil: objects on the head of a pin , 2006, OOPSLA '06.

[5]  Jens Palsberg,et al.  Vertical Object Layout and Compression for Fixed Heaps , 2009, Semantics and Algebraic Specification.

[6]  Marco Platzner,et al.  Object-oriented domain specific compilers for programming FPGAs , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[7]  Hiroyuki Tomiyama,et al.  Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis , 2009, J. Inf. Process..

[8]  Jonathan Rose,et al.  Measuring the Gap Between FPGAs and ASICs , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Jonathan Rose,et al.  Measuring the Gap Between FPGAs and ASICs , 2007, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[10]  Jack Donovan,et al.  SystemC: From the Ground Up , 2004 .

[11]  Jens Palsberg,et al.  The ExoVM system for automatic VM and application reduction , 2007, PLDI '07.

[12]  Jason Cong,et al.  Lithographic aerial image simulation with FPGA-based hardwareacceleration , 2008, FPGA '08.

[13]  Jayaram Bhasker A Verilog HDL Primer , 1997 .

[14]  Martin Schoeberl Java Technology in an FPGA , 2004, FPL.

[15]  Philippe Coussy,et al.  High-Level Synthesis: from Algorithm to Digital Circuit , 2008 .

[16]  Craig Chambers,et al.  The design and implementation of the self compiler, an optimizing compiler for object-oriented programming languages , 1992 .

[17]  Volnei A. Pedroni Circuit Design with VHDL , 2004 .

[18]  Chris Lattner,et al.  LLVM: AN INFRASTRUCTURE FOR MULTI-STAGE OPTIMIZATION , 2000 .