Novel TFET circuits for high-performance energy-efficient heterogeneous MOSFET/TFET logic
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[1] Ian A. Young,et al. Variation-tolerant dense TFET memory with low VMIN matching low-voltage TFET logic , 2015, 2015 Symposium on VLSI Technology (VLSI Technology).
[2] Ian A. Young,et al. Tunnel Field-Effect Transistors: Prospects and Challenges , 2015, IEEE Journal of the Electron Devices Society.
[3] E. Memišević,et al. Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at Vds = 0.3 V , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).
[4] Huichu Liu,et al. Enabling high-performance heterogeneous TFET/CMOS logic with novel circuits using TFET unidirectionality and low-VDD operation , 2016, 2016 IEEE Symposium on VLSI Technology.
[5] David Blaauw,et al. Low-Power Circuit Analysis and Design Based on Heterojunction Tunneling Transistors (HETTs) , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[6] Ian A. Young,et al. Design of Low Voltage Tunneling-FET Logic Circuits Considering Asymmetric Conduction Characteristics , 2014, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.
[7] Dmitri E. Nikonov,et al. Energy efficiency comparison of nanowire heterojunction TFET and Si MOSFET at Lg=13nm, including P-TFET and variation considerations , 2013, 2013 IEEE International Electron Devices Meeting.