30V new fine trench MOSFET with ultra low on-resistance
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The present paper proposes a new ultra low on-resistance trench MOSFET. The proposed device is characterized by the narrow high resistance n-epi layer between the two trench gates and the thin n-drift layer, which lies between the trench bottom and the n+ substrate. The high resistance n-epi between the trenches is always depleted because of the built-in potential of the p+ gate poly, resulting in the normally-off characteristics without p-base. The thin n-drift layer enables the use of thin gate oxide. The optimum doping concentration and thickness of the n-drift is chosen so that the on-resistance is minimized. The proposed trench MOSFET experimentally achieved a 33(V) drain-source blocking voltage and a 10m/spl Omega/mm/sup 2/ specific on-resistance at V/sup GS/=10V. This is the lowest Ron value ever reported.
[1] P. Venkatraman,et al. The accumulation-mode field-effect transistor: a new ultralow on-resistance MOSFET , 1992, IEEE Electron Device Letters.