A thermal performance measurement method for blind through silicon vias (TSVs) in a 300mm wafer

This paper demonstrates an effective TSV test-key and the coupled measurement method to determine TSVs' (through-silicon vias) thermal integrity before wafer thinning by using a thermal measuring technique. The test-key comprises two linear metallic traces with the same shape which are deposited on a silicon wafer: one coupled with a line of embedded blind vias, the other coupled without any via. By measuring the thermal resistance difference (ΔR) between both traces and comparing it with a calculated “low bar” of ΔR, one can easily diagnose the TSVs and determine there are seams/voids or not. To verify the method, the TSV test-keys in a 300mm silicon wafer with 750μm thick are fabricated. The measured results show the test-key can produce a ΔR that is large enough to measure and are in good agreement with the simulation results. In this study, we also provide some techniques to shorten the measurement time as well as the guidelines to help users designing their test-key.

[1]  T. Nakamura,et al.  Intelligent image sensor chip with three dimensional structure , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[2]  K. W. Lee,et al.  Three-dimensional shared memory fabricated using wafer stacking technology , 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

[3]  Katsuyuki Sakuma,et al.  Three-dimensional silicon integration , 2008, IBM J. Res. Dev..

[4]  Mitsumasa Koyanagi,et al.  Future system-on-silicon LSI chips , 1998, IEEE Micro.

[5]  Daniel Lu,et al.  Materials for Advanced Packaging , 2008 .

[6]  M. Koyanagi,et al.  Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections , 2006, IEEE Transactions on Electron Devices.

[7]  Yu-Po Wang,et al.  The advent of 3-D package age , 2000, Twenty Sixth IEEE/CPMT International Electronics Manufacturing Technology Symposium (Cat. No.00CH37146).

[8]  J. Lau,et al.  Advanced MEMS Packaging , 2009 .