Flow Graph Representation

Methodologies based on simple components, such as gate arrays and standard cells, are not adequate when designing complex VLSI systems. Silicon compilation, an evolutionary step from standard cell methodology, offers an increase in design complexity with an increase in design productivity. Silicon compilers can be broadly divided into structural, functional, and intelligent silicon compilers ([GajsSS]). In structural silicon compilation, the designer explicitly defines the microarchitecture; i.e. a structure consisting of registers, busses, RAMS and ALUs. Functional silicon compilers transform a behavioral description into a microarchitecture automatically.