A compact 0.045–2.3 GHz frequency synthesizer with a wide tuning range low phase noise VCO for software defined radios

A compact 0.045–2.3 GHz wideband fractional-N frequency synthesizer (FS) for software defined radios (SDR) applications is presented in this paper. Based on a single phase locked loop (PLL) that employs one integrated inductor-capacitor voltage controlled oscillator (VCO), the proposed FS can provide a wide operating frequency range. The VCO adopts an optimized circular inductor to mitigate the phase noise degradation caused by the high VCO gain. The in-band phase noise is optimized by employing current mode logic dividers and true single phase clock dividers. The PLL provides the differential outputs ranging from 2.3 to 4.6 GHz and the 0.045–2.3 GHz quadrature local oscillator signals are generated by the following divider chain. The proposed FS is implemented in TSMC 180 nm RFCMOS process and provides a phase noise performance less than − 116 dBc/Hz at 1 MHz offset. The maximum power consumption is 54 mW. The die size including pads and I/O is 1.92 mm2 with an active core area of 1.13 mm2. This proposed circuit has the great potential for SDR applications.