Data rate optimization on PLC devices with current controller for low access impedance

Access impedance of power line channel is mostly frequency dependent. PLC devices manufactures determine the transmitted signal on the electrical power grid as voltage, based on EN50065-1. However, the transmitted signal (voltage) often does not reach the specified signal in EN50065-1 because of the energy efficiency rules of PLC devices. The power consumption limitation of PLC devices is realized by reduction on the power amplifier (PA) output voltage level. The PA output reduction is implemented by current regulator based on current measurement. As a consequence of the PA output level reduction, the transmitted signal reduces at the transmitter and receiver side which reduce the performance of the PLC systems and the data rate as well. In this paper we present the effect of the access impedance by reducing the data rate of PLC systems. In our simulation, we find the achievable data rate considering access impedance values related to EN50065-1 and measurements done in China and Austria. We introduce optimization algorithms to improve the achievable data rate by disabling subcarriers in frequencies with low access impedance which increases automatically the signal on the other subcarriers with sufficient access impedance. These algorithms can be combined with most of PLC standards since the modification on the transmitted signal is only produced from the PLC channel and the receiver should be able under specific constraints to handle these changes.