Robust neural logic block (NLB) based on memristor crossbar array

Neural networks are considered as promising candidates for implementing functions in memristor crossbar array with high tolerance to device defects and variations. Based on such arrays, Neural Logic Blocks (NLB) with learning capability can be built to replace Configurable Logic Block (CLB) in programmable logic circuits. In this article, we describe a neural learning method to implement Boolean functions in memristor NLB. By using Monte-Carlo simulation, we demonstrate its high robustness against most important device defects and variations, like static defects and memristor voltage threshold variability.

[1]  J. Neumann Probabilistic Logic and the Synthesis of Reliable Organisms from Unreliable Components , 1956 .

[2]  Gregory S. Snider,et al.  Spike-timing-dependent learning in memristive nanodevices , 2008, 2008 IEEE International Symposium on Nanoscale Architectures.

[3]  Gregory S. Snider,et al.  ‘Memristive’ switches enable ‘stateful’ logic operations via material implication , 2010, Nature.

[4]  T. Cao,et al.  Logic Gates and Computation from Assembled Nanowire Building Blocks , 2001 .

[5]  J. Yang,et al.  A Family of Electronically Reconfigurable Nanodevices , 2009 .

[6]  J. Orbach Principles of Neurodynamics. Perceptrons and the Theory of Brain Mechanisms. , 1962 .

[7]  John J. Hopfield,et al.  Simple 'neural' optimization networks: An A/D converter, signal decision circuit, and a linear programming circuit , 1986 .

[8]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[9]  Jonathan Rose,et al.  A Verilog RTL synthesis tool for heterogeneous FPGAs , 2005, International Conference on Field Programmable Logic and Applications, 2005..

[10]  C. Lieber,et al.  Nanowire Crossbar Arrays as Address Decoders for Integrated Nanosystems , 2003, Science.

[11]  Jacques-Olivier Klein,et al.  Hight fault tolerance in neural crossbar , 2010, 5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era.

[12]  Kwabena Boahen,et al.  Thermodynamically Equivalent Silicon Models of Voltage-Dependent Ion Channels , 2007, Neural Computation.

[13]  Damien Querlioz,et al.  Simulation of a memristor-based spiking neural network immune to device variations , 2011, The 2011 International Joint Conference on Neural Networks.

[14]  Qiangfei Xia,et al.  Self-aligned memristor cross-point arrays fabricated with one nanoimprint lithography step. , 2010, Nano letters.

[15]  P. Cochat,et al.  Et al , 2008, Archives de pediatrie : organe officiel de la Societe francaise de pediatrie.

[16]  W. Lu,et al.  High-density Crossbar Arrays Based on a Si Memristive System , 2008 .

[17]  L.O. Chua,et al.  Memristive devices and systems , 1976, Proceedings of the IEEE.

[18]  Wei Yang Lu,et al.  Nanoscale memristor device as synapse in neuromorphic systems. , 2010, Nano letters.

[19]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[20]  T. Hasegawa,et al.  Learning Abilities Achieved by a Single Solid‐State Atomic Switch , 2010, Advanced materials.

[21]  C. Gamrat,et al.  Nanotube devices based crossbar architecture: toward neuromorphic computing , 2010, Nanotechnology.

[22]  W. Lu,et al.  CMOS compatible nanoscale nonvolatile resistance switching memory. , 2008, Nano letters.

[23]  Charles M. Lieber,et al.  Logic Gates and Computation from Assembled Nanowire Building Blocks , 2001, Science.

[24]  Stephen Y. Chou,et al.  Imprint of sub-25 nm vias and trenches in polymers , 1995 .

[25]  Carver A. Mead,et al.  Neuromorphic electronic systems , 1990, Proc. IEEE.

[26]  Jacques-Olivier Klein,et al.  Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[27]  Weisheng Zhao,et al.  Two‐Terminal Carbon Nanotube Programmable Devices for Adaptive Architectures , 2010, Advanced materials.

[28]  Bernard Widrow,et al.  Adaptive switching circuits , 1988 .