A Threshold Switch Augmented Hybrid-FeFET (H-FeFET) with Enhanced Read Distinguishability and Reduced Programming Voltage for Non-Volatile Memory Applications

In this work, we demonstrate a novel Hybrid-FeFET (H-FeFET) that leverages the threshold switching characteristics of Ag/HfO<inf>2</inf> to overcome the fundamental trade-off between memory window MW /read current ratio (I<inf>read,1</inf>/I<inf>read,0</inf>) , and program voltage (V<inf>prog</inf>)/maximum electric-field in standard FeFETs for non-volatile memory application. The H-FeFET incorporates the threshold switch (TS) in the source of the FeFET, and is designed to exhibit a ferroelectric state-dependent volatile HRS to LRS transition (I<inf>ON</inf>/I<inf>OFF</inf> >10<sup>7</sup>) – during read, the TS turns ON only if the FeFET is in the low-V<inf>T</inf> SET state, and remains OFF if the FeFET is in the high-V<inf>T</inf> RESET state, thus, selectively suppressing the RESET read current. Leveraging this principle, the H-FeFET: a Demonstrates 77% higher MW and 1000× larger I<inf>read,1</inf>/I<inf>read,0</inf> compared to the FeFET, at iso-V<inf>prog</inf> (DC); (b) Enables 25% reduction in V<inf>prog</inf> at iso-I<inf>read,1</inf>/I<inf>read,0</inf> during pulse operation-facilitated by the 8× improvement in I<inf>read,1</inf>/I<inf>read,0</inf>; (c) Exhibits 2.5×reduction in programming power at iso-I<inf>read,1</inf>/I<inf>read,0</inf> in the H-FeFET-based AND array architecture, as shown by simulations. Thus, the H-FeFET overcomes the FeFET design challenges while retaining its existing advantages, making it a promising candidate for nonvolatile memory applications.