A 10-b 100-MSPS low power pipeline ADC for high energy physics experiments
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S. D'Amico | M. De Matteis | A. Baschirotto | A. Donno | A. Baschirotto | A. Donno | M. De Matteis | S. D’Amico
[1] I. Mehr,et al. A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC , 2000 .
[2] Eric Andre,et al. A 1.2V 4.5mW 10b 100MS/s Pipeline ADC in a 65nm CMOS , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[3] Ya-Lun Yang,et al. A 1V 11b 200MS/s Pipelined ADC with Digital Background Calibration in 65nm CMOS , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[4] Dong-Young Chang. Design techniques for a pipelined ADC without using a front-end sample-and-hold amplifier , 2004, IEEE Trans. Circuits Syst. I Regul. Pap..
[5] Bahar Jalali Farahani,et al. Low Power High Performance Digitally Assisted Pipelined ADC , 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.
[6] Stephen H. Lewis,et al. A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers , 1997, IEEE J. Solid State Circuits.
[7] T. Nirschl,et al. Yield and speed optimization of a latch-type voltage sense amplifier , 2004, IEEE Journal of Solid-State Circuits.
[8] Kari Halonen,et al. CMOS dynamic comparators for pipeline A/D converters , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).
[9] Lauri Sumanen,et al. Pipeline analog-to-digital converters for wide-band wireless communications , 2002 .
[10] Byung-Moo Min,et al. A 69-mW 10-bit 80-MSample/s Pipelined CMOS ADC , 2003, IEEE J. Solid State Circuits.
[11] Marko Zavrtanik,et al. Properties and performance of the prototype instrument for the Pierre Auger Observatory , 2004, Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment.