Behavioral design and prototyping of a fail-safe system

This paper presents a methodology for designing and prototyping a fail-safe system at behavioral level. The theoretical framework for fail-safe circuits in the literature is difficult to apply in practice because of the complexity of practical systems. In this paper, a fail-safe system is defined at the behavioral level. The fail-safe rules in the system specification allow fault-tree analysis to verify the fail-safeness. To illustrate the methodology, a microprocessor-based fail-safe system for interlocking on railways is presented.<<ETX>>