A novel test-data compression technique using application-aware bitmask and dictionary selection methods

Higher circuit densities in System-on-Chip (SOC) designs have led to enhancement in the test data volume. Larger test data size demands not only greater memory requirements, but also an increase in the testing time. Test data compression addresses this problem by reducing the test data volume without affecting the overall system performance. This paper proposes a novel test data compression technique using bitmasks which provides a significant enhancement in the compression efficiency without introducing any additional decompression penalty. The major contributions of this paper are as follows: i) it develops an efficient bitmask selection technique for test data in order to create maximum matching patterns; ii) it develops an efficient dictionary selection method which takes into account the speculated results of compressed codes and iii) it proposes a suitable code compression technique using dictionary and bitmask based code compression that can reduce the memory and time requirements. We have used our algorithm on various test data sets and compared our results with other existing test compression techniques. Our algorithm outperforms the best known existing compression technique up to 30%, giving a best possible compression of 92.2%.

[1]  Priti Shankar,et al.  Compressing Dynamic Data Structures in Operating System Kernels ∗ , 2009 .

[2]  Nur A. Touba,et al.  Test vector decompression via cyclical scan chains and its application to testing core-based designs , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[3]  Bashir M. Al-Hashimi,et al.  Improving Compression Ratio, Area Overhead, and Test Application Time for System-on-a-Chip Test Data Compression/Decompression , 2002, DATE.

[4]  Janak H. Patel,et al.  Test set compaction algorithms for combinational circuits , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[5]  Sang-Joon Nam,et al.  Improving dictionary-based code compression in VLIW architectures , 1999 .

[6]  Nagisa Ishiura,et al.  Instruction Code Compression for Application Specific VLIW Processors Based on Automatic Field Partitioning , 2007 .

[7]  Nur A. Touba,et al.  Test data compression using dictionaries with selective entries and fixed-length indices , 2003, TODE.

[8]  Yuan Xie,et al.  LZW-based code compression for VLIW embedded systems , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[9]  Krishnendu Chakrabarty,et al.  Deterministic Built-in Pattern Generation for Sequential Circuits , 1999, J. Electron. Test..

[10]  J.H. Patel,et al.  Test set compaction algorithms for combinational circuits , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[11]  Wayne H. Wolf,et al.  SAMC: a code compression algorithm for embedded processors , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Krishnendu Chakrabarty,et al.  Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression , 2001, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001.

[13]  Montserrat Ros,et al.  A hamming distance based VLIW/EPIC code compression technique , 2004, CASES '04.

[14]  Andrew Wolfe,et al.  Executing compressed programs on an embedded RISC architecture , 1992, MICRO.

[15]  Trevor N. Mudge,et al.  Improving code density using compression techniques , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.

[16]  Kurt Keutzer,et al.  Code density optimization for embedded DSP processors using data compression techniques , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  Krishnendu Chakrabarty,et al.  System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Prabhat Mishra,et al.  An Efficient Code Compression Technique using Application-Aware Bitmask and Dictionary Selection Methods , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.