论文信息 - Two-level Reconfigurable Architecture for High-Performance Signal Processing - 字舞流文

Two-level Reconfigurable Architecture for High-Performance Signal Processing

High speed signal processing is often performed as a pipeline of functions on streams or blocks of data. In order to obtain both flexibility and performance, parallel, reconfigurable array structur ...

Bertil Svensson | Jerker Bengtsson | Dennis Johnsson

[1] Markus Weinhardt,et al. PACT XPP—A Self-Reconfigurable Data Processing Architecture , 2004, The Journal of Supercomputing.

[2] V. K. Prasanna,et al. Utilizing the power of high-performance computing , 1998 .

[3] André DeHon,et al. The Density Advantage of Configurable Computing , 2000, Computer.

[4] Henry Hoffmann,et al. The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs , 2002, IEEE Micro.

[5] Rupert Baines,et al. A total cost approach to evaluating different reconfigurable architectures for baseband processing in wireless receivers , 2003, IEEE Commun. Mag..

[6] John G. Proakis,et al. Digital Signal Processing: Principles, Algorithms, and Applications , 1992 .