Carbon Nanotubes as Microbumps for 3D Integration

In the future, electronics will face many challenges beyond the prediction of Moore’s law. In this context, nanopackaging will play a crucial role for enabling future electronics to be consistent with future component, system, and circuit board (or global-level) requirements. Moreover, assembly approaches are moving toward heterogeneous three-dimensional integrated circuits (3D ICs) with silicon via wafer thinning, bonding technologies, and 3D system integration and miniaturization. Many of these packaging and assembly requirements are triggering an unprecedented pace of innovation in terms of new technologies, new system integration techniques, and new materials. Intensive research investigations are focused on carbon nanotubes (CNTs), graphene, 2D materials, nanowires, nanoparticles, and so on. In addition, many challenges remain to be faced with regard to the development of state-of-the-art interconnect interfaces, the development of predictive modeling tools based on multidisciplinary and advanced multiscales approaches, and the fabrication and tests of representative demonstrators with a significant impact.

[1]  K. Banerjee,et al.  Current Status and Future Perspectives of Carbon Nanotube Interconnects , 2008, 2008 8th IEEE Conference on Nanotechnology.

[2]  S. Iijima,et al.  Linking chiral indices and transport properties of double-walled carbon nanotubes. , 2002, Physical review letters.

[3]  E. Teo,et al.  Characterization of CNT interconnection bumps implemented for 1st level flip chip packaging , 2011, 2011 IEEE 13th Electronics Packaging Technology Conference.

[4]  W. Heinrich,et al.  The flip-chip approach for millimeter wave packaging , 2005, IEEE Microwave Magazine.

[5]  Sang-Sub Song,et al.  A Millimeter-Wave System-on-Package Technology Using a Thin-Film Substrate With a Flip-Chip Interconnection , 2009 .

[6]  Dongwook Lee,et al.  Crystallization and surface morphology of Au/SiO2 thin films following furnace and flame annealing , 2009 .

[7]  J. Mintmire,et al.  Fundamental properties of single-wall carbon nanotubes. , 2005, The journal of physical chemistry. B.

[8]  C. Xu,et al.  Carbon Nanomaterials for Next-Generation Interconnects and Passives: Physics, Status, and Prospects , 2009, IEEE Transactions on Electron Devices.

[9]  Jae-Bum Kim,et al.  Characteristics of nitrogen-doped carbon nanotubes synthesized by using PECVD and Thermal CVD , 2012 .

[10]  L. Martinu,et al.  Adhesion improvement of plasma-deposited silica thin films on stainless steel substrate studied by x-ray photoemission spectroscopy and in situ infrared ellipsometry , 1998 .

[11]  D. K. Basa Plasma treatment studies of MIS devices , 2010 .

[12]  W. Heinrich,et al.  Theory and measurements of flip-chip interconnects for frequencies up to 100 GHz , 2001 .

[13]  P. Burke Luttinger liquid theory as a model of the gigahertz electrical properties of carbon nanotubes , 2002 .

[14]  Teng Wang,et al.  Paper-mediated controlled densification and low temperature transfer of carbon nanotube forests for electronic interconnect application , 2013 .

[15]  Omkaram Nalamasu,et al.  Contact transfer of aligned carbon nanotube arrays onto conducting substrates , 2006 .

[16]  Zhiyong Xiao,et al.  Horizontally aligned carbon nanotube bundles for interconnect application: diameter-dependent contact resistance and mean free path , 2010, Nanotechnology.

[17]  Zhiyong Xiao,et al.  Inductance Properties of In Situ-Grown Horizontally Aligned Carbon Nanotubes , 2011, IEEE Transactions on Electron Devices.

[18]  Carbon nanotube array vias for interconnect applications , 2007, 0708.1298.

[19]  K. Joshin,et al.  Thermal and source bumps utilizing carbon nanotubes for flip-chip high power amplifiers , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[20]  Takashi Mizutani,et al.  Carbon nanotubes for VLSI: Interconnect and transistor applications , 2010, Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications.

[21]  Y. Awano,et al.  Carbon nanotube bumps for LSI interconnect , 2008, 2008 58th Electronic Components and Technology Conference.

[22]  John Robertson,et al.  Growth process conditions of vertically aligned carbon nanotubes using plasma enhanced chemical vapor deposition , 2001 .

[23]  J. Meindl,et al.  Performance Modeling for Single- and Multiwall Carbon Nanotubes as Signal and Power Interconnects in Gigascale Systems , 2008, IEEE Transactions on Electron Devices.

[24]  P. Ajayan,et al.  Fabrication and Electrical Characterization of Densified Carbon Nanotube Micropillars for IC Interconnection , 2009, IEEE Transactions on Nanotechnology.

[25]  W. Milne,et al.  Efficient diffusion barrier layers for the catalytic growth of carbon nanotubes on copper substrates , 2009 .

[26]  K. Laasonen,et al.  Nitrogen-Doped Single-Walled Carbon Nanotube Thin Films Exhibiting Anomalous Sheet Resistances , 2011 .

[27]  S. Louie,et al.  Structural deformation and intertube conductance of crossed carbon nanotube junctions. , 2000, Physical review letters.

[28]  Electromigration Study in Flip Chip Solder Joints , 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

[29]  Daoben Zhu,et al.  Controllable preparation of patterns of aligned carbon nanotubes on metals and metal-coated silicon substrates , 2003 .

[30]  S. Schulz,et al.  Carbon nanotubes for nanoscale low temperature flip chip connections , 2010 .

[31]  W. Choi,et al.  Controlled growth and electrical characterization of bent single-walled carbon nanotubes , 2008, Nanotechnology.

[32]  H. Finzel,et al.  The Effect of Annealing on the Electrical Resistivity of Thin Gold Films , 2007 .

[33]  B. Tay,et al.  Formation and assembly of carbon nanotube bumps for interconnection applications , 2009 .

[34]  C.P. Wong,et al.  Nanopackaging research at Georgia Tech , 2009, IEEE Nanotechnology Magazine.

[35]  B. Tay,et al.  EFFECTS OF UNDER CNT METALLIZATION LAYERS ON CARBON NANOTUBES GROWTH , 2008 .

[36]  Extracting Resistances of Carbon Nanostructures in Vias , 2009, 2009 IEEE International Conference on Microelectronic Test Structures.

[37]  Contact resistances of carbon nanotubes grown under various conditions , 2010, 2010 IEEE Nanotechnology Materials and Devices Conference.

[38]  H. Dai,et al.  Self-oriented regular arrays of carbon nanotubes and their field emission properties , 1999, Science.

[39]  A. Slocum,et al.  Method of characterizing electrical contact properties of carbon nanotube coated surfaces , 2006 .

[41]  Yoon,et al.  Crossed nanotube junctions , 2000, Science.