IP core design of PCI-slave interface based on FPGA

Using IP (intellectual property) is an inevitable choice in SOC design. Building an IP library can save much time and manpower for the design later. Thus the efficiency of IC design will be improved. Based on the idea, the verilog design for PCI- slave interface are discussed. The architecture concept, the function blocks, the simulation and other considerations from different angles are introduced briefly. And the state machine is introduced in detail. The results of simulation and verification show that the bus controller IP core meets the PCI local bus specification revision 2.2 in the functional specification and timing characters, met the expectation.