Energy and area efficient imprecise compressors for approximate multiplication at nanoscale

Abstract Approximate computing is a new paradigm for designing energy-efficient integrated circuits at the nanoscale. In this paper, we propose efficient imprecise 4:2 and 5:2 compressors by modifying the truth table of the exact compressors to achieve simpler logic functions with fewer output errors. The proposed approach leads to imprecise compressors with significantly fewer transistors and higher performance in comparison with their previous counterparts. Moreover, efficient approximate multipliers are designed based on the proposed imprecise compressors. The circuits are designed using FinFET as one of the leading industrial technologies and are simulated with HSPICE at 7 nm technology node. Furthermore, the approximate multipliers are used in the image processing applications, including image multiplication, sharpening and smoothing, and the peak signal to noise ratio (PSNR) and mean structure similarity index metric (MSSIM) as two important quality metrics are calculated using MATLAB. The results indicate significant improvements regarding performance, energy-efficiency, and the number of transistors compared to the other existing exact and approximate designs. The proposed 4:2 and 5:2 compressors improve the power delay product (PDP), on average by 59% and 68%, and area by 60% and 75%, respectively, in comparison with the previous designs. In addition, the proposed multipliers provide a significant compromise between hardware efficiency and accuracy for approximate computing. The proposed approximate multiplier using both imprecise 4:2 and 5:2 compressors improves the figure of merit, considering both image quality (based on PSNR and MSSIM) and energy efficiency, by 2.35 times as compared to its previous counterparts.