Task rescheduling in application specific processors with built-in-self-repair facility and variable arithmetic accuracy
暂无分享,去创建一个
[1] Mario Schölzel,et al. DESCOMP: A New Design Space Exploration Approach , 2005, ARCS.
[2] Miodrag Potkonjak,et al. Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors , 2000, IEEE Trans. Computers.
[3] G. Goossens,et al. CATHEDRAL II—a computer-aided synthesis system for digital signal processing VLSI systems , 1988 .
[4] Cristiana Bolchini,et al. A software methodology for detecting hardware faults in VLIW data paths , 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.
[5] Alex Orailoglu. Microarchitectural synthesis of gracefully degradable, dynamically reconfigurable ASICs , 1996, Proceedings International Conference on Computer Design. VLSI in Computers and Processors.
[6] Alex Orailoglu,et al. High-level synthesis of gracefully degradable ASICs , 1996, Proceedings ED&TC European Design and Test Conference.