Adaptation of Current Signals with Floating-Gate Circuits
暂无分享,去创建一个
[1] Tor Sverre Lande,et al. An analog floating-gate memory in a standard digital technology , 1996, Proceedings of Fifth International Conference on Microelectronics for Neural Networks.
[2] Giacomo Indiveri,et al. Neuromorphic vision sensors and preprocessors in system applications , 1998, Other Conferences.
[3] Douglas A. Kerns. Experiments in very large-scale analog computation , 1993 .
[4] Mohammed Ismail,et al. Analog VLSI Implementation of Neural Systems , 2011, The Kluwer International Series in Engineering and Computer Science.
[5] Carver A. Mead,et al. A Complementary Pair of Four-Terminal Silicon Synapses , 1997 .
[6] Paul Hasler,et al. An Autozeroing Floating-Gate Amplifier , 2001 .
[7] Christof Koch,et al. Analog VLSI Circuits for Attention-Based, Visual Tracking , 1996, NIPS.
[8] W. Guggenbuhl,et al. An analog trimming circuit based on a floating-gate device , 1988 .
[9] Carver Mead,et al. Adaptive Retina , 1989, Analog VLSI Implementation of Neural Systems.
[10] Paul Hasler,et al. Floating-gate CMOS analog memory cell array , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).
[11] Alan F. Murray,et al. Pulse stream VLSI neural networks , 1994, IEEE Micro.
[12] M. Lenzlinger,et al. Fowler‐Nordheim Tunneling into Thermally Grown SiO2 , 1969 .
[13] M. Lenzlinger,et al. Fowler-Nordheim tunneling into thermally grown SiO 2 , 1968 .
[14] L. Carley,et al. Trimming analog circuits using floating-gate analog MOS memory , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.
[15] Ming Zhang,et al. Trimming CMOS smart imager with tunnel-effect nonvolatile analogue memory , 1993 .
[16] Bedrich J. Hosticka,et al. A 128-pixel CMOS image sensor with integrated analog nonvolatile memory , 1998 .
[17] Simon M. Tam,et al. Implementation and performance of an analog nonvolatile neural network , 1993 .
[18] Paul Hasler,et al. An autozeroing amplifier using PFET hot-electron injection , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.
[19] Gert Cauwenberghs,et al. Analysis and verification of an analog VLSI incremental outer-product learning system , 1992, IEEE Trans. Neural Networks.
[20] Christopher J. Diorio. Neurally inspired silicon learning : from synapse transistors to learning arrays , 1997 .
[21] John Wawrzynek,et al. Systems technologies for silicon auditory models , 1994, IEEE Micro.
[22] Ping-Keung Ko,et al. EEPROM as an analog storage device, with particular applications in neutral networks , 1992 .
[23] C. Mead,et al. Neuromorphic analogue VLSI. , 1995, Annual review of neuroscience.