VCS: A Verifier for Component-Based Systems
暂无分享,去创建一个
[1] Min Zhou,et al. Modeling and Validation of PLC-Controlled Systems: A Case Study , 2012, 2012 Sixth International Symposium on Theoretical Aspects of Software Engineering.
[2] Niklas Sörensson,et al. Temporal induction by incremental SAT solving , 2003, BMC@CAV.
[3] Ming Gu,et al. Optimizing the SAT Decision Ordering of Bounded Model Checking by Structural Information , 2013, 2013 International Symposium on Theoretical Aspects of Software Engineering.
[4] Gu Ming,et al. Modeling and Validation of a Data Process Unit Control for Space Applications , 2012 .
[5] Joseph Sifakis,et al. Modeling Heterogeneous Real-time Components in BIP , 2006, Fourth IEEE International Conference on Software Engineering and Formal Methods (SEFM'06).
[6] Joseph Sifakis,et al. D-Finder: A Tool for Compositional Deadlock Detection and Verification , 2009, CAV.
[7] Joseph Sifakis,et al. Source-to-source architecture transformation for performance optimization in BIP , 2009, 2009 IEEE International Symposium on Industrial Embedded Systems.
[8] Peter H. Feiler,et al. The Architecture Analysis & Design Language (AADL): An Introduction , 2006 .