Integrated Design of a Class-J Power Amplifier

This paper discusses the design of a monolithic microwave integrated circuit (MMIC) class-J GaN power amplifier (PA). Theoretical derivations of optimum load impedances, output power, and efficiency are presented to demonstrate their dependence on the quality factor of the integrated inductor used in the output matching network. A group of design curves are obtained to select the optimum transistor size and impedance according to the required output power and efficiency for a given inductor loss. An analytical-based design methodology using the design curves is proposed. To verify the accuracy of this analytical design approach, an integrated 0.5-W 15-V monolithic microwave integrated circuit PA is fabricated in 0.8-<formula formulatype="inline"> <tex Notation="TeX">$\mu$</tex></formula>m GaN technology. The PA exhibits greater than 50% drain efficiency over 825 MHz, from 2.25 to 3.075<formula formulatype="inline"><tex Notation="TeX">$~$</tex></formula>GHz.

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