Verification of wafer-level calibration accuracy at high temperatures

This article presents the results of accuracy verification of wafer-level calibration at high temperatures based on coplanar calibration standards. The electrical characteristics of different commercially available coplanar calibration lines were extracted and compared at different temperatures. Finally, the accuracy of lumped calibrations at variable temperatures was verified by definition of the worst-case error bounds for the measurement of passive devices and compared to the reference NIST multiline TRL.

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