A 4GHz, low latency TCAM in 14nm SOI FinFET technology using a high performance current sense amplifier for AC current surge reduction
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Juergen Pille | Shankar Kalyanasundaram | Michael Kugel | Dieter F. Wendel | Rolf Sautter | Otto A. Torreiter | Alexander Fritsch | Daniel A. Dobson | S. Kalyanasundaram | D. Wendel | Daniel Dobson | Alexander Fritsch | O. Torreiter | Michael Kugel | Rolf Sautter | J. Pille
[1] Igor Arsovski,et al. 1Gsearch/sec Ternary Content Addressable Memory compiler with silicon-aware Early-Predict Late-Correct single-ended sensing , 2012, 2012 Symposium on VLSI Circuits (VLSIC).
[2] Igor Arsovski,et al. Self-referenced sense amplifier for across-chip-variation immune sensing in high-performance Content-Addressable Memories , 2006, IEEE Custom Integrated Circuits Conference 2006.
[3] Evert Seevinck,et al. Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's , 1991 .
[4] Manoj Sachdev,et al. Design techniques and test methodology for low-power TCAMs , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[5] Richard C. Jaeger,et al. A high-speed clamped bit-line current-mode sense amplifier , 1991 .
[6] K. Pagiamtzis,et al. Content-addressable memory (CAM) circuits and architectures: a tutorial and survey , 2006, IEEE Journal of Solid-State Circuits.