Hardware implementation of SLM technique for OFDM communication systems

Requirement of high data rate by the modern mobile communication system requires a linear power amplifier with extremely low power consumption and long battery life. Orthogonal frequency division multiplexing (OFDM) modulation technique promises to deliver high data rate with simple receiver structure. It is more spectral efficient and has been recommended to be used by many standards. But it has one major disadvantage of having high peak to average power ratio (PAPR). High PAPR drives the power amplifier in saturation region and causes it to operate in nonlinear region with reduced efficiency. There are several techniques to reduce PAPR of OFDM system. In this paper we have done FPGA implementation of selective mapping method (SLM) for PAPR reduction for 4 QAM baseband signal for 64, 128, 256, 512 and 1024 number of subcarriers. The result obtained have been compared with PAPR values obtained through mathematical analysis and Matlab simulations and also with original signal. For 1024 number of subcarriers at 10−3 of CCDF value the PAPR value obtained with hardware implementation is 9.8 dB which is 2.8 dB less form the original OFDM signal obtained without applying SLM technique but 0.9 dB higher than the Matlab simulated value. This technique is simple in implementation, utilizes less resources and is effective in PAPR reduction.