INVERSE PARK TRANSFORMATION USING CORDIC AND PHASE-LOCKED LOOP

Faster and precise solution of inverse Park transformation is required to reach the optimal efficiency and steadiness of the servo drive. The main problem in presenting such solution lies in completing the transformation within a limited clock cycles as well as execution time. One of the options could be to implement the overall transformation algorithm into field programmable gate array (FPGA) for reducing the execution time significantly. This research presents a fully integrated solution of inverse Park transformation by incorporating Coordinate Rotation Digital Computer (CORDIC), Arithmetic and Phase-locked Loop (PLL) modules. The result shows that the proposed FPGA performance is required only 68ns of execution time for operating frequency of 30 MHz and accuracy of 99.9%, which is the lowest computational cycle for the era.

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