Scalable read-out schemes for qubits
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[1] Christian Grewing,et al. Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers , 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).
[2] M. J. Kelly,et al. Multiplexed Charge-locking Device for Large Arrays of Quantum Devices , 2014, 1408.2872.
[3] M. Veldhorst,et al. Silicon CMOS architecture for a spin-based quantum computer , 2016, Nature Communications.
[4] Alessandro Rossi,et al. A CMOS dynamic random access architecture for radio-frequency readout of quantum devices , 2018, Nature Electronics.
[5] R. Ishihara,et al. Interfacing spin qubits in quantum dots and donors—hot, dense, and coherent , 2017, npj Quantum Information.
[6] Edoardo Charbon,et al. Cryo-CMOS Circuits and Systems for Quantum Computing Applications , 2018, IEEE Journal of Solid-State Circuits.
[7] Jonas Helsen,et al. A crossbar network for silicon quantum dot qubits , 2017, Science Advances.
[8] H. Lu,et al. Cryogenic Control Architecture for Large-Scale Quantum Computing , 2014, 1409.2202.
[9] M. J. Kelly,et al. Cryogenic on-chip multiplexer for the study of quantum transport in 256 split-gate devices , 2013, 1306.4229.
[10] Yu Chen,et al. 29.1 A 28nm Bulk-CMOS 4-to-8GHz ¡2mW Cryogenic Pulse Modulator for Scalable Quantum Computing , 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).
[11] S. Barraud,et al. Conditional Dispersive Readout of a CMOS Single-Electron Memory Cell , 2017, 1708.04159.
[12] L. Vandersypen,et al. Spin Lifetime and Charge Noise in Hot Silicon Quantum Dot Qubits. , 2018, Physical review letters.