Integrated flip-chip flex-circuit packaging for power electronics applications

A novel flip-chip flex-circuit packaging platform is described that enables integration of multiple power dies and control circuitry with an advantageous form factor. A key attribute of this packaging platform is to extend the well-established flex-circuit and flip-chip soldering technologies in signal electronics to power electronics applications. The planar interconnection and flip-chip method facilitate multilayer packaging structure with reduced packaging dimensions and reduced packaging parasitics. A half-bridge test vehicle designed and fabricated for DC/AC inverter applications (42 V, 16 A) with an overall flex-circuit module footprint less than 30% that of a discrete device printed circuit board implementation has been modeled and demonstrated experimentally. Electrical results, confirmed with circuit simulation incorporating parasitic inductance electromagnetic modeling, have shown a turn-off voltage overshoot reduction of over 40% and a switching energy loss reduction of 24% with the flip-chip flex-circuit implementation. The power flex platform has a strong potential for integrated multichip power module applications that require minimized packaging size and parasitic inductance for high switching frequency and efficiency.

[1]  E. J. Rymaszewski,et al.  Flip-chip flex-circuit packaging for power electronics , 2001, Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).

[2]  S. S. Wen,et al.  Dimple-array interconnect technique for packaging power semiconductor devices and modules , 2001, Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216).

[3]  Lawrence T. Pileggi,et al.  Generating sparse partial inductance matrices with guaranteed stability , 1995, ICCAD.

[4]  V. Temple.  SPCO's thinpak package, an ideal building block for Power modules and Power hybrids , 1999 .

[5]  Ray-Lee Lin,et al.  An innovative technique for packaging power electronic building blocks using metal posts interconnected parallel plate structures , 1999 .

[6]  Ken Gilleo,et al.  Handbook of Flexible Circuits , 1998 .

[7]  D. Silber,et al.  Exact inductive parasitic extraction for analysis of IGBT parallel switching including DCB-backside eddy currents , 2000, 2000 IEEE 31st Annual Power Electronics Specialists Conference. Conference Proceedings (Cat. No.00CH37018).

[8]  Fred Barlow,et al.  The utilization of polymer thick film (PTF) and flex technologies for low cost Power electronics packaging of DC/DC down converters , 1999 .

[9]  D. Kinzer,et al.  The semiconductor roadmap for power management in the new millennium , 2001, Proc. IEEE.

[10]  L. Schnur,et al.  Low inductance, explosion robust IGBT modules in high power inverter applications , 1998, Conference Record of 1998 IEEE Industry Applications Conference. Thirty-Third IAS Annual Meeting (Cat. No.98CH36242).

[11]  D. Staffiere,et al.  Power Technology Roadmap , 1998, APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition.

[12]  J. Flannery,et al.  Benchmark of power packaging for DC/DC and AC/DC converters , 2002 .

[13]  J.D. Van Wyk,et al.  Power electronics technology at the dawn of the new millenium-status and future , 1999, 30th Annual IEEE Power Electronics Specialists Conference. Record. (Cat. No.99CH36321).

[14]  Fred C. Lee,et al.  Embedded power technology for IPEMs packaging applications , 2001, APEC 2001. Sixteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.01CH37181).

[15]  A. Sawle,et al.  Novel power MOSFET packaging technology doubles power density in synchronous buck converters for next generation microprocessors , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).

[16]  R. Fillion,et al.  High frequency, low cost, power packaging using thin film power overlay technology , 1995, Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition - APEC'95.

[17]  R. Natarajan,et al.  Flip-chip flex-circuit packaging for 42 V/16 A integrated power electronics module applications , 2002, APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.02CH37335).

[18]  Guo-Quan Lu,et al.  Three-dimensional flip-chip on flex packaging for power electronics applications , 2001 .