Unified functional decomposition via encoding for FPGA technology mapping

Functional decomposition has recently been adopted for look-up table (LUT)-based field-programmable gate array (FPGA) technology mapping with good results. In this paper we propose a novel method to unify functional single-output and multiple-output decomposition. We first address a compatible class encoding algorithm to minimize the number of compatible classes in the image function. After applying the encoding algorithm, we can therefore improve the decomposability in the subsequent decomposition of the image function. The above encoding algorithm is then extended to encode multiple-output functions through the construction of a hyperfunction. Common subexpressions among these multiple-output functions can be extracted during the decomposition of the hyperfunction. Consequently, we can handle multiple-output decomposition in the same manner as single-output decomposition. Experimental results show that our algorithms are promising.

[1]  Robert K. Brayton,et al.  Optimum Functional Decomposition Using Encoding , 1994, 31st Design Automation Conference.

[2]  Klaus Eckl,et al.  Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm , 1995, 32nd Design Automation Conference.

[3]  Jason Cong,et al.  Partially-dependent functional decomposition with applications in FPGA synthesis and mapping , 1997, FPGA '97.

[4]  Wen-Zen Shen,et al.  Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping , 1995, 32nd Design Automation Conference.

[5]  Randal E. Bryant,et al.  Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.

[6]  Laurence A. Wolsey,et al.  Integer and Combinatorial Optimization , 1988, Wiley interscience series in discrete mathematics and optimization.

[7]  Jie-Hong Roland Jiang,et al.  BDD based lambda set selection in Roth-Karp decomposition for LUT architecture , 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

[8]  Massoud Pedram,et al.  OBDD-based function decomposition: algorithms and implementation , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Richard M. Karp,et al.  Minimization Over Boolean Graphs , 1962, IBM J. Res. Dev..

[10]  Robert K. Brayton,et al.  MIS: A Multiple-Level Logic Optimization System , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[11]  Laurence A. Wolsey,et al.  Integer and Combinatorial Optimization , 1988 .

[12]  Jing-Yang Jou,et al.  Compatible class encoding in Roth-Karp decomposition for two-output LUT architecture , 1995, ICCAD.

[13]  Klaus Eckl,et al.  Computing support-minimal subfunctions during functional decomposition , 1998, IEEE Trans. Very Large Scale Integr. Syst..

[14]  H. Sawada,et al.  Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[15]  R. Karp Functional Decomposition and Switching Circuit Design , 1963 .

[16]  Minh N. Do,et al.  Youn-Long Steve Lin , 1992 .

[17]  Sze-Tsen Hu ON THE DECOMPOSITION OF SWITCHING FUNCTIONS , 1961 .