Using buffer-to-BRAM mapping approaches to trade-off throughput vs. memory use
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[1] Implementing FPGA Design with the OpenCL Standard , 2010 .
[2] Jason Cong,et al. Automatic memory partitioning and scheduling for throughput and power optimization , 1999, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.
[3] Jonathan Rose,et al. Definition and solution of the memory packing problem for field-programmable systems , 1994, ICCAD.
[4] Frédo Durand,et al. Decoupling algorithms from schedules for easy optimization of image processing pipelines , 2012, ACM Trans. Graph..
[5] Tarek S. Abdelrahman,et al. hiCUDA: High-Level GPGPU Programming , 2011, IEEE Transactions on Parallel and Distributed Systems.
[6] Andy Gean Ye,et al. Analysis and architecture design of scalable fractional motion estimation for H.264 encoding , 2012, Integr..
[7] Edward H. Adelson,et al. PYRAMID METHODS IN IMAGE PROCESSING. , 1984 .
[8] David Pellerin,et al. Practical FPGA programming in C , 2005 .
[9] Pedro C. Diniz,et al. A compiler approach to managing storage and memory bandwidth in configurable architectures , 2008, TODE.
[10] C. D. Gelatt,et al. Optimization by Simulated Annealing , 1983, Science.
[11] Francky Catthoor,et al. Incremental hierarchical memory size estimation for steering of loop transformations , 2007, TODE.
[12] Jason Cong,et al. Optimizing memory hierarchy allocation with loop transformations for high-level synthesis , 2012, DAC Design Automation Conference 2012.
[13] Gang Wang,et al. Storage assignment during high-level synthesis for configurable architectures , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..
[14] Herman Schmit,et al. Synthesis of application-specific memory designs , 1997, IEEE Trans. Very Large Scale Integr. Syst..
[15] Nikil D. Dutt,et al. Local memory exploration and optimization in embedded systems , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[16] Jason Helge Anderson,et al. LegUp: high-level synthesis for FPGA-based processor/accelerator systems , 2011, FPGA '11.
[17] Jason Cong,et al. Polyhedral-based data reuse optimization for configurable computing , 2013, FPGA '13.