SCR based ESD protection in nanometer SOI technologies
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[1] B. Van Camp,et al. Current detection trigger scheme for SCR based ESD protection of output drivers in CMOS technologies avoiding competitive triggering , 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.
[2] Sung-Mo Kang,et al. EOS/ESD protection circuit design for deep submicron SOI technology , 1995, Electrical Overstress/Electrostatic Discharge Symposium Proceedings.
[3] S. S. Yuen,et al. Comparison of ESD protection capability of SOI and bulk CMOS output buffers , 1994, Proceedings of 1994 IEEE International Reliability Physics Symposium.
[4] Koen G. Verhaege,et al. High Holding Current SCRs (HHI-SCR) for ESD protection and latch-up immune IC operation , 2002, 2002 Electrical Overstress/Electrostatic Discharge Symposium.
[5] C.C. Russ,et al. GGSCRs: GGNMOS Triggered silicon controlled rectifiers for ESD protection in deep sub-micron CMOS processes , 2001, 2001 Electrical Overstress/Electrostatic Discharge Symposium.
[6] Elyse Rosenbaum,et al. Prediction of ESD protection levels and novel protection devices in thin film SOI technology , 1997 .
[7] M. Mergens,et al. Diode-triggered SCR (DTSCR) for RF-ESD protection of BiCMOS SiGe HBTs and CMOS ultra-thin gate oxides , 2003, IEEE International Electron Devices Meeting 2003.