Decoupling Capacitors Placement for a Multichip PDN by a Nature-Inspired Algorithm

This contribution deals with the optimal placement of the decoupling capacitances on the gridded power delivery network of a multichip assembly with interposer. The optimization is performed by means of a nature-inspired algorithm of the genetic class. Different placement strategies are considered and compared. The cost function is based on the evaluation of the input impedance looked into the power and ground rails of the power distribution network and its comparison with a user-defined mask.

[1]  A. Gardner Methods of Statistics , 1941 .

[2]  Taigon Song,et al.  PDN Impedance Modeling and Analysis of 3D TSV IC by Using Proposed P/G TSV Array Model Based on Separated P/G TSV and Chip-PDN Models , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[3]  Junho Lee,et al.  High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV) , 2011, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[4]  Douglas H. Werner,et al.  Genetic Algorithms in Electromagnetics , 2007 .

[5]  A. Orlandi,et al.  Analytical Unit Cell Assembly for Efficient Chip/Package Power Distribution Network Modeling , 2017, IEEE Microwave and Wireless Components Letters.

[6]  Slawomir Koziel,et al.  Performance Optimization of EBG-Based Common Mode Filters for Signal Integrity Applications , 2016 .

[7]  Randy L. Haupt,et al.  Practical Genetic Algorithms , 1998 .

[8]  Thomas R. Cuthbert,et al.  Optimization Using Personal Computers: With Applications to Electrical Networks , 1987 .

[9]  Carole-Jean Wu,et al.  MCM-GPU: Multi-chip-module GPUs for continued performance scalability , 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).

[10]  Christine M. Anderson-Cook Practical Genetic Algorithms (2nd ed.) , 2005 .

[11]  Jun Fan,et al.  Signal/Power Integrity Analysis for Multilayer Printed Circuit Boards Using Cascaded S-Parameters , 2010, IEEE Transactions on Electromagnetic Compatibility.

[12]  Joungho Kim,et al.  Modeling and Analysis of a Power Distribution Network in TSV-Based 3-D Memory IC Including P/G TSVs, On-Chip Decoupling Capacitors, and Silicon Substrate Effects , 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[13]  Stephen H. Hall,et al.  Advanced Signal Integrity for High-Speed Digital Designs , 2009 .

[14]  Xin-She Yang,et al.  Simulation-Driven Modeling and Optimization: ASDOM, Reykjavik, August 2014 , 2016 .

[15]  Xin-She Yang,et al.  Nature-inspired computing and optimization , 2017 .

[16]  Larry Smith,et al.  Principles of Power Integrity for PDN Design: , 2018, 2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI).

[17]  Madhavan Swaminathan,et al.  Book review: Design and modeling for 3D ICs and interposers , 2013, IEEE Electromagnetic Compatibility Magazine.

[18]  A. Orlandi,et al.  Feature selective validation (FSV) for validation of computational electromagnetics (CEM). part I-the FSV method , 2006, IEEE Transactions on Electromagnetic Compatibility.

[19]  A. Orlandi,et al.  Feature selective validation (FSV) for validation of computational electromagnetics (CEM). part II- assessment of FSV performance , 2006, IEEE Transactions on Electromagnetic Compatibility.