Stochastic A/D sigma-delta converter on FPGA

A stochastic approach to the digital implementation of A/D sigma-delta converter is proposed. The resulting digital circuits is much more efficient in terms of silicon area compared to the area employed in conventional digital filters. A practical realization of an A/D sigma-delta converter using a FPGA is presented.

[1]  Solomon W. Golomb.  On the classification of balanced binary sequences of period 2n-1 (Corresp.) , 1980, IEEE Trans. Inf. Theory.

[2]  Leopoldo García Franquelo,et al.  Power energy metering based on random signal processing (EC-RPS) , 1998, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187).

[3]  Mark B. Sandler,et al.  Linearising sigma-delta modulators using dither and chaos , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[4]  Terri S. Fiez,et al.  Analog VLSI : signal and information processing , 1994 .

[5]  Brian R. Gaines,et al.  Stochastic Computing Systems , 1969 .

[6]  Leopoldo García Franquelo,et al.  Fully parallel stochastic computation architecture , 1996, IEEE Trans. Signal Process..

[7]  Leopoldo García Franquelo,et al.  Analog to digital and digital to analog conversion based on stochastic logic , 1995, Proceedings of IECON '95 - 21st Annual Conference on IEEE Industrial Electronics.