Power-Temperature Stability and Safety Analysis for Multiprocessor Systems

Modern multiprocessor system-on-chips (SoCs) integrate multiple heterogeneous cores to achieve high energy efficiency. The power consumption of each core contributes to an increase in the temperature across the chip floorplan. In turn, higher temperature increases the leakage power exponentially, and leads to a positive feedback with nonlinear dynamics. This paper presents a power-temperature stability and safety analysis technique for multiprocessor systems. This analysis reveals the conditions under which the power-temperature trajectory converges to a stable fixed point. We also present a simple formula to compute the stable fixed point and maximum thermally-safe power consumption at runtime. Hardware measurements on a state-of-the-art mobile processor show that our analytical formulation can predict the stable fixed point with an average error of 2.6%. Hence, our approach can be used at runtime to ensure thermally safe operation and guard against thermal threats.

[1]  Sarma B. K. Vrudhula,et al.  Performance Optimal Online DVFS and Task Migration Techniques for Thermally Constrained Multi-Core Processors , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[2]  Lawrence T. Pileggi,et al.  Efficient full-chip thermal modeling and analysis , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[3]  Ümit Y. Ogras,et al.  Predictive dynamic thermal and power management for heterogeneous mobile platforms , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[4]  Sheldon X.-D. Tan,et al.  Dynamic thermal management for multi-core microprocessors considering transient thermal effects , 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

[5]  Umit Y. Ogras,et al.  Dynamic Power Budgeting for Mobile Systems Running Graphics Workloads , 2018, IEEE Transactions on Multi-Scale Computing Systems.

[6]  Carla E. Brodley,et al.  Heat stroke: power-density-based denial of service in SMT , 2005, 11th International Symposium on High-Performance Computer Architecture.

[7]  Yu Hu,et al.  TSocket: Thermal Sustainable Power Budgeting , 2016, TODE.

[8]  Muhammad Shafique,et al.  Improving mobile gaming performance through cooperative CPU-GPU thermal management , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).

[9]  Sherief Reda,et al.  Thermal prediction and adaptive control through workload phase detection , 2013, TODE.

[10]  Margaret Martonosi,et al.  An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).

[11]  Li Shang,et al.  Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors , 2007, IEEE Micro.

[12]  Huazhong Yang,et al.  Accurate temperature-dependent integrated circuit leakage power estimation is easy , 2007 .

[13]  Trevor Mudge,et al.  MiBench: A free, commercially representative embedded benchmark suite , 2001 .

[14]  Mahmut T. Kandemir,et al.  Leakage Current: Moore's Law Meets Static Power , 2003, Computer.

[15]  Onur Sahin,et al.  QScale: Thermally-efficient QoS management on heterogeneous mobile platforms , 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[16]  Sung Woo Chung,et al.  On the Thermal Attack in Instruction Caches , 2010, IEEE Transactions on Dependable and Secure Computing.

[17]  K. Skadron,et al.  Potential thermal security risks , 2005, Semiconductor Thermal Measurement and Management IEEE Twenty First Annual IEEE Symposium, 2005..

[18]  Naehyuck Chang,et al.  Dynamic thermal management in mobile devices considering the thermal coupling between battery and application processor , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[19]  Yu-Min Lee,et al.  Full-chip thermal analysis for the early design stage via generalized integral transforms , 2008, 2008 Asia and South Pacific Design Automation Conference.

[20]  Arnold Neumaier,et al.  Introduction to Numerical Analysis , 2001 .

[21]  Li Shang,et al.  ISAC: Integrated Space-and-Time-Adaptive Chip-Package Thermal Analysis , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[22]  Kai Li,et al.  The PARSEC benchmark suite: Characterization and architectural implications , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

[23]  M. Sachdev,et al.  Thermal runaway in integrated circuits , 2006, IEEE Transactions on Device and Materials Reliability.

[24]  Y OgrasUmit,et al.  Power-Temperature Stability and Safety Analysis for Multiprocessor Systems , 2017 .

[25]  Oguz Ergin,et al.  User-specific skin temperature-aware DVFS for smartphones , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[26]  Li Shang,et al.  System-Level Dynamic Thermal Management for High-Performance Microprocessors , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[27]  Dilip Krishnaswamy,et al.  PROMETHEUS: A Proactive Method for Thermal Management of Heterogeneous MPSoCs , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[28]  Heba Khdr,et al.  Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon , 2017, IEEE Transactions on Computers.

[29]  Kevin Skadron,et al.  HotSpot: a compact thermal modeling methodology for early-stage VLSI design , 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[30]  John L. Henning SPEC CPU2006 benchmark descriptions , 2006, CARN.

[31]  Lei He,et al.  Coupled Power and Thermal Simulation with Active Cooling , 2003, PACS.

[32]  Luca Benini,et al.  An Effective Gray-Box Identification Procedure for Multicore Thermal Modeling , 2014, IEEE Transactions on Computers.

[33]  Krste Asanovic,et al.  Reducing power density through activity migration , 2003, ISLPED '03.

[34]  Sachin S. Sapatnekar,et al.  A high efficiency full-chip thermal simulation algorithm , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..