Fabrication of sub‐100‐nm T gates with SiN passivation layer

Low resistance T‐shaped gates as small as 60 nm have been fabricated using high resolution electron‐beam lithography (EBL). A silicon nitride (SiNx) passivation layer has been used to define the bottom of the T gate and to provide mechanical support for the top of the T gate. A two‐step etch was performed to define the gate footprint in the SiNx. First a short wet etch is used to isotropically etch the SiNx to provide a wider top opening following by reactive ion etching (RIE) to transfer the narrow resist pattern anisotropically into the bottom of the SiNx. A bilayer resist lift‐off process is then used to determine the top of the T gate and the thickness of the gate metal. End‐to‐end gate resistances of 450 Ω/mm have been measured for sub‐0.1‐μm‐long gates with a 0.5‐μm‐wide top and with 250‐nm‐thick metallization. The resistance can easily be further decreased by increasing the metal thickness and/or by widening the top of the T gate. Gate capacitances Cgs and Cgd measured on GaAs metal–semiconductor f...